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FPGA

Xilinx KC705: product homepage (to xilinx.com)

Xilinx official evaluation board. Quick memo for me...

FPGA: Kintex-7 XC7K325T-2FFG900C
Flash memory (SPI): Micron N25Q128A13BSF40F or Micron MT25QL128ABA8ESF-0SIT

Vivado

I cought an error "Caused by: java.lang.IllegalArgumentException: Window must not be zero" during launching the Vivado 2018.03, and crashed. This might happen if using three or more monitors on Linux. Xilinx AR72614 solved this bug.

VHDL


            signal some_vect : std_logic_vector(7 downto 0);

            signal part_vect : std_logic_vector(1 downto 0);


            some_vect <= (1 downto 0 => part_vect, others => '0'); -- this is not allowed

            some_vect <= (0 => part_vect(0), 1 => part_vect(1), others => '0'); -- this is OK.

MCU

I have used AVR MCU mainly.

AVR Downloder/UploaDEr: Project page on Savannah